/*
 * Timers.c
 *
 *  Created on: 29/12/2012
 *      Author: Bowmer
 */
#include "inc/hw_types.h"
#include "inc/lm4f120h5qr.h"
#include "driverlib/gpio.h"


void Timer0_Init(void){

	//Enable PORTB peripheral
	SYSCTL_RCGCGPIO_R |= SYSCTL_RCGCGPIO_R1;                                                                                             //Add PORTB to enabled peripherals

	//Configure PORTB
	GPIO_PORTB_DIR_R |= 0x40|0x80;                                                                                                                                         //Pins 6,7 are outputs
	GPIO_PORTB_AFSEL_R |= 0x40|0x80;                                                                                                                                    //Alternate function on pins 6,7
	GPIO_PORTB_PCTL_R |= GPIO_PCTL_PB6_T0CCP0|GPIO_PCTL_PB7_T0CCP1;   //Alternate function is Timer0 CCP
	GPIO_PORTB_DEN_R |= 0x40|0x80;


	/**********************/
	/*  Configure TIMER0  */
	/**********************/

	/* Enable TIMER0 peripheral */
	SYSCTL_RCGCTIMER_R |= SYSCTL_RCGCTIMER_R0;
	/* Disable Timers A and B */
	TIMER0_CTL_R &= ~(0x00000101);
	/* 16 bit timer */
	TIMER0_CFG_R = 0x00000404;
	/* Configure as PWM, continuous */
	TIMER0_TAMR_R = 0x0000000A;
	TIMER0_TBMR_R = 0x0000000A;
	/* Invert the output */
	TIMER0_CTL_R |= 0x00004040;



	/* 24 bit period value - TAPR contains bits 16-23, TAILR contains bits 15-0 */
	/* Given fCPU 40MHz, need period of 20ms */
	/* 40E6*0.02 = 0d800000 = 0x0c3500*/
	TIMER0_TAPR_R = 0x0c;
	TIMER0_TAILR_R = 0x3500;


	/* 24 bit match value - TAPMR contains bits 16-23, TAMATCHR contains bits 15-0 */
	/* Given fCPU 40MHz, need high time of 2ms */
	/* 40E6*0.002 = 0d80000 = 0x013880 */

	// Don't need to set up match values. These are set in the main While() loop
	//            TIMER0_TAPMR_R = 0x01;
	//            TIMER0_TAMATCHR_R = 0x3880;


	/* Same for TimerB */
	TIMER0_TBPR_R = 0x0c;
	TIMER0_TBILR_R = 0x3500;


	/* Enable Timers A and B */
	TIMER0_CTL_R |= 0x00000101;

}


void Timer1_Init(void){

	//Configure PORTC on the APB
	SYSCTL_GPIOHBCTL_R &= ~SYSCTL_GPIOHBCTL_PORTC;

	//Enable PORTC peripheral
	SYSCTL_RCGCGPIO_R |= SYSCTL_RCGCGPIO_R2;							//Add PORTC to enabled peripherals

	//Configure PORTC
	GPIO_PORTC_DIR_R = (GPIO_PORTC_DIR_R & ~GPIO_PIN_7)|GPIO_PIN_6;		//Pin 7 is an input, 6 is an output. Maintain other bits
	GPIO_PORTC_AFSEL_R |= GPIO_PIN_7;						            //Alternate function on pin 7
	GPIO_PORTC_PCTL_R |= GPIO_PCTL_PC7_WT1CCP1;	                        //Alternate function is Timer1 CCP
	GPIO_PORTC_DEN_R |= GPIO_PIN_6|GPIO_PIN_7;							//Digital enable
	GPIO_PORTC_PDR_R = GPIO_PIN_6|GPIO_PIN_7;


	/**********************/
	/*  Configure TIMER1  */
	/**********************/

	/* Enable Wide TIMER1 peripheral */
	SYSCTL_RCGCWTIMER_R |= SYSCTL_RCGCWTIMER_R1;


	/* Disable Timers A and B */
	WTIMER1_CTL_R &= ~(0x00000101);
	/* 32 bit timer */
	WTIMER1_CFG_R = 0x00000004;
	/* Configure as Match Interrupt Enable, Count Up, One Shot */
	WTIMER1_TAMR_R = 0x00000031;
	/* Configure as Count Up, Input Edge timing */
	WTIMER1_TBMR_R = 0x00000017;
	/* Timer1B generates events on both rising and falling edges */
	WTIMER1_CTL_R |= 0x00000C00;

	/* Invert the output on Timer1A-PWM */
	WTIMER1_CTL_R |= 0x0000040;

	/* Timer1B Event, 1A Overflow Interrupts Enabled */
	WTIMER1_IMR_R = 0x00000401;

	/* 48 bit match value - TAPR contains bits 32-47, TAMATCHR contains bits 0-31 */
	/* Given fCPU 40MHz, need period of 1000ms */
	/* 40E6*1.000 = 0d40000000 = 0x02625A00*/
	WTIMER1_TAPR_R = 0x0000;
	WTIMER1_TAILR_R = 0x0180;

	WTIMER1_TBPR_R = 0xFFFF;
	WTIMER1_TBILR_R = 0xFFFFFFFF;


	/* Enable TimerB (timerA gets triggered by request) */
	WTIMER1_CTL_R |= 0x00000100;

	// Enable Timer1A/B Interrupts in the NVIC
	NVIC_EN3_R |= NVIC_EN0_INT0|NVIC_EN0_INT1;

}

void Timer2_Init(void){

	/**********************/
	/*  Configure TIMER2  */
	/**********************/

	/* Enable Wide TIMER2 peripheral */
	SYSCTL_RCGCWTIMER_R |= SYSCTL_RCGCWTIMER_R2;


	/* Disable Timers A and B */
	WTIMER2_CTL_R &= ~(0x00000101);
	/* 32 bit timer */
	WTIMER2_CFG_R = 0x00000004;
	/* Configure as Count Up, One Shot */
	WTIMER2_TAMR_R = 0x00000012;

	/* 2A Overflow Interrupts Enabled */
	WTIMER2_IMR_R = 0x00000001;

	/* Given fCPU 40MHz, need period of 1000ms */
	/* 40E6*1.000 = 0d40000000 = 0x02625A00*/
	WTIMER2_TAPR_R = 0x0000;
	WTIMER2_TAILR_R = 0x02625A00;


	// Enable Timer1A Interrupts in the NVIC
	NVIC_EN3_R |= NVIC_EN0_INT2;


	/* Enable Timer A */
	WTIMER2_CTL_R |= 0x00000001;
}
